Abstract
Steady advancement in integrated circuit (IC) manufacturing and design over the past five decades has resulted in the proliferation of information technology, with dramatic impact on virtually every aspect of life in modern society. Today, three-dimensional (3D) transistor structures are being adopted in the most advanced processes to facilitate continued transistor miniaturization for increased functional density and lower cost per function. 3D integration represents a complementary approach for increasing functional density, and will become predominant as practical limits for transistor scaling are reached. The speaker will discuss fundamental challenges for transistor scaling and for cost-effective 3D integration to sustain the growth of the semiconductor industry beyond the next decade.
About the speaker
Prof Tsu-Jae King Liu received her BS, MS and PhD in Electrical Engineering from Stanford University. From 1992 to 1996, she was a Member of Research Staff at the Xerox Palo Alto Research Center. In 1996, she joined the faculty of the University of California at Berkeley, where she is currently the TSMC Distinguished Professor in Microelectronics, and Chair of the Department of Electrical Engineering and Computer Sciences.
Prof Liu's research activities are presently in advanced materials, process technology and devices for energy-efficient electronics.Her research awards include the Defense Advanced Research Projects Agency (DARPA) Significant Technical Achievement Award for development of the FinFET, the Institute of Electrical and Electronics Engineers (IEEE) Kiyo Tomiyasu Award for contributions to nanoscale MOS transistors, memory devices, and Micro Electro Mechanical Systems (MEMs) devices, the Intel Outstanding Researcher in Nanotechnology Award, and the Semiconductor Industry Association Outstanding Researcher Award. She has authored or co-authored close to 500 publications and holds over 90 US patents, and is a Fellow of the IEEE.
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